Tutorial:Getting started with FPGA-SoC and Linux Yocto on Terasic DE1-SoC board

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You will learn: how to configure HPS, add it into your FPGA project and establish communication between HPS and FPGA.
Music: CyberSDF-Wallpaper
—————–All project files are available on my Github———-


  1. hello, i have a question regarding the process. why didn't you go through the preloader and uboot steps and the bsp builder?
    does the terasic image linux contains a default preloader if so what does it differ from a custom one ? and when should i use a custom
    as for the boot which pins did you set on the board ? is it "00000"? thank you

  2. I agree this is a fantastic tutorial. Also agree that it's much better than anything from Altera. Most of their tutorials are just propaganda that end up teaching you nothing and have no practical implementation examples. The only thing that could make this video better is if you showed how to generate BSP, uboot, linux kernel and root file system from scratch and put on SD card. If you had a video like that to accompany this it would very easily be the best altera HPS SOC linux tutorial video on the entire internet.

  3. Hi, i am trying out this on the Arria 10 SoC board. I am running the below C code but do not see the LED turning on.
    Any idea how to debug?

    I am using the GRSD 17.0 on A-10 SoC

    #define REG_BASE 0xFF200000
    #define REG_SPAN 0x00200000
    #define LED_BASE 0x970

    void* virtual_base;
    void* led_addr;
    void* sw_addr;
    int fd;
    int switches;
    int main(int argc, char** argv)

    printf("Perry's Trying to Turn on All LEDsn");

    printf("Perry's Before1 Led Address %x = %un", led_addr, *(unsigned int *)led_addr);
    *(unsigned int *)led_addr=0x1;
    printf("Perry's After2 Led Address %x = %un", led_addr, *(unsigned int *)led_addr);

    return 0;

  4. Hey. I thank you a lot as your presentation is very easy to understand for a student. I do not have the de1 soc but de0 nano soc. I do all like you say (with a de0_anon_pin_assignemnt) and when i compile i have this mistake :- Error (14566): The Fitter cannot place 14 periphery component(s) due to conflicts with existing constraints (14 pin(s)). For each 14 nodes, i have for example :- Error (175020): The Fitter cannot place logic pin in region (55, 61) to (55, 61), to which it is constrained, because there are no valid locations in the region for logic of this type.   Info (14596): Information about the failing component(s):
          Info (175028): The pin name(s): HPS_SPIM_CLK
       Error (16234): No legal location could be found out of 1 considered location(s).  Reasons why each location could not be used are summarized below:
       Error (184016): There were not enough single-ended output pin locations available (1 location affected)
        Info (175029): C19
       Info (175015): The I/O pad HPS_SPIM_CLK is constrained to the location PIN_C19 due to: User Location Constraints (PIN_C19)
        Info (14709): The constrained I/O pad is contained within this pin
    I think its due by the fact theses nodes are bidirectionnals (altera say "you have to put LCELL" for each one… i do not know how do that). Do you have any ideas ?Thanks you for your time.LS

  5. Thanx Toni for your help. I followed your video carefully and tried to implement it on De1SoC board Cyclone V. I am getting this sort of error:
    Error (35030): Partition "<name>_hps_0_hps_io_border:border" contains I/O cells that do not connect to top-level pins or have illegal connectivity.
    Would you please help?

  6. Hello Toni, and thank you for these tutorials, they really helped me a lot. I just have a question. How do you connect to the FPGA using putty? Do you build a UART connection, similar to your Tutorial 3? Or is there something I'm missing?

  7. by following this video tutorial on my Arrow SoCKit , i reach up to running the Code "./HPSFPGA" on PuTTY Console , but nothing happen, i mean NO error NO LED Glow by Switching SW on/OFF.

    As i don't have ARM License so i cross Compile this code on my ubuntu 10.04 machine by adding the required Quartus libraries. and run the command on Linux console.
    "#arm-linux-gnueabi-gcc-4.6 HPSFPGA.c -o HPSFPGA" (No Error Successfully Compile)

    If i add in C-Code like "Hello from SoCKit", it displayed this message on PuTTY,
    but it won't open the fd = open("dev/mem", (O_PDWR|O_SYNC)); and stuck after that.

  8. thank you for your tutor. Wenn I try to run your example there is a error that "Error (210006): Can't save or open file D:/SOC_tutorial-master/Tutorial_1/db/ip/hps_fpga/submodules/sequencer/alt_types.pre.h

  9. Hi Toni. Great job you are doing here, a lot helpful for beginners like me. My only question is, why do you need to change all that QUartus timing configuration on Qsys and where can I find them for my board? I'm wondering if you intend to make a tutorial for DE0-nano-soc board. I bought one recently and I am trying to make the FPGA and the HPS talk just like in this video. I've found on github the pin assignment file (mabe it is yours: https://github.com/AntonZero/LED-Matrix-with-DE0-Nano-SoC-Board), and will look at the timing configurations appropriate for my board to repeat your steps. Thanks for your video!

  10. Thanks!
    Great tutorial!

    Can you do one in where you explain how to program the fpga from the hps?
    I have a synthesized design and a .sof file, now I want to change the current hardware for the new one.

    Also can you do one where you use the UART to communicate the fpga to a PC?


  11. Hi toni. I'm a student in korea. There is not many documents about fpga examples with my language. Your tutorial was so helpful. Thank you so much.  
    I have a problems with using HPS-FPGA bridge which has some protocol, like as spi and i2c. I can use adxl345(g-sensor) using i2c protocol which is not on the soc . But that chip on de1-soc is connected on HPS, It was hard to me bring values of g-sensor to fpga. could you give me some clues of using it? I really want a know. anyway thanks!

  12. Hi Toni T800, This video helps me a lot! 
    By the end of part1, it happened errors in compilation. I wonder if you know what's wrong. I did follow your steps, and believe I did exactly the same. Here is the error:

    Error (174052): I/O "HPS_DDR3_DQS_P[3]" has dynamic termination control connected, but does not use parallel termination
    Error (174068): Output buffer atom "HF_TUT_COMP:u0|HF_TUT_COMP_hps_0:hps_0|HF_TUT_COMP_hps_0_hps_io:hps_io|HF_TUT_COMP_hps_0_hps_io_border:border|hps_sdram:hps_sdram_inst|hps_sdram_p0:p0|hps_sdram_p0_acv_hard_memphy:umemphy|hps_sdram_p0_acv_hard_io_pads:uio_pads|hps_sdram_p0_altdqdqs:dq_ddio[3].ubidir_dq_dqs|altdq_dqs2_acv_connect_to_hard_phy_cyclonev:altdq_dqs2_inst|obuf_os_0" has port "SERIESTERMINATIONCONTROL[0]" connected, but does not use calibrated on-chip termination

    Thanks in advance!

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